1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory including a redundancy circuit to relieve a defect.
2. Description of the Related Art
Generally, a semiconductor memory includes a redundancy circuit in order to improve the yield by relieving defects caused by a lattice defect in a substrate and foreign particles produced in a fabrication process. For example, a nonvolatile memory such as a flash memory includes a redundancy word line or a redundancy bit line in addition to normal word lines or bit lines. When a defect in a memory cell is detected in a test process, defect information indicating the address of the defective memory cell is programmed into a fuse circuit or the like in order to replace the word line or the bit line connected to the defective memory cell with the redundancy word line or the redundancy bit line. Relieving the defective memory cell using the redundancy circuit improves the yield of the semiconductor memory. For example, the fuse circuit into which the defect information is programmed is formed outside a memory cell array (for example, Japanese Unexamined Patent Application Publication No. Hei 11-339488).
Also, a method of programming the defect information into a nonvolatile memory cell (defect-information memory cell) in the nonvolatile semiconductor memory is disclosed. This kind of nonvolatile semiconductor memory is provided with a dedicated programming circuit to program the defect information into each defect-information memory cell and a dedicated sense amplifier to read the defect information from the defect-information memory cell (for example, Japanese Unexamined Patent Application Publication No. 2000-207894).
However, providing a dedicated control circuit for accessing the defect-information memory cell increases the chip size of the nonvolatile semiconductor memory. Especially, in case that Contents Addressable Memory cell (CAM cell) is used as the defect-information memory cell, the chip size becomes larger. Moreover, in a normal read operation, it is desirable to determine whether or not to use the redundancy circuit as soon as possible in order to shorten the access time.